SUMMARY DESCRIPTION. The M48Z02/12 ZEROPOWER® RAM is a 2K x 8 non-volatile static RAM which is pin and functional compatible with the DS Datasheets, M48Zx2. Other Related Documents, M48Z02 View All Specifications. EDA / CAD Models? Download from Ultra Librarian. Online Catalog, NVSRAM. M48ZPC1 STMicroelectronics | ND DigiKey Electronics. M48ZPC1 NVSRAM Datasheets, M48Zx2. EDA / CAD Models? Download.
|Published (Last):||21 April 2009|
|PDF File Size:||2.55 Mb|
|ePub File Size:||11.44 Mb|
|Price:||Free* [*Free Regsitration Required]|
M48ZPC1 – STMicroelectronics – PCB Footprint & Symbol Download
Operating and AC Measurement Conditions. AC Testing Load Circuit. Crystal Accuracy Across Temperature. Satasheet without any requirement for special. WRITE timing or limitations on the number of. WRITEs that can be performed. Exposure to Absolute Maximum Rat. Stressing the device above the rating listed in the. Lead Solder Temperature for 10 seconds.
Input or Output Voltages. Soldering temperature not to exceed ? C for 10 seconds total thermal budget not to exceed ? C for longer than 30 seconds. This section summarizes the operating and mea. Supply Voltage V CC. Ambient Operating Temperature T A. Load Capacitance C L. Input Rise and Fall Times. Input and Output Timing Ref. Output Hi-Z is defined as the point where data is no longer driven.
CL includes JIG capacitance.
Effective capacitance measured with power supply at 5V. Valid for Ambient Operating Temperature: The control circuitry constantly monitors. As V CC falls be.
When V CC is out of tolerance, the circuit write. See Table 10, page 11 for details. The device architecture allows ripple-through. Thus, the unique address. If the outputs are datashedt. If the Address In. If the E and. G access times are not met, valid data will be. Address Valid to Output Valid. Chip Enable Low to Output Valid. Output Enable Low to Output Valid. Chip Enable Low datashset Output Transition.
Output Enable Low to Output Transition. Address Transition to Output Transition. Data-in must be valid t D. W and E are active. G should be kept high during. WRITE cycles to avoid bus contention; although, if.
M48Z02 Datasheet(PDF) – STMicroelectronics
The addresses must be held valid. E or W must return high for. Address Valid to Chip Enable 1 Low. Chip Enable High to Address Transition. Input Valid to Chip Enable High. Chip Enable High to Input Transition.
Address Valid to Chip Enable High. Should the supply voltage decay, the RAM will au. All outputs become high imped. At voltages below V PFD minthe user can be. The power switching circuit connects external V CC. As V CC rises, the battery voltage. If the voltage is too low, an internal.
If the BOK flag. The flag is automatically cleared after the first. For more information on a Battery Storage Life re. Inputs may or may not be recognized at this time. Battery Back-up Switchover Voltage.
Expected Data Retention Time. All voltages referenced to V SS. I CC transients, including those produced by output. F as shown in Figure.
In addition to transients that are caused by normal. SRAM operation, power cycling can generate neg. Schottky diode 1N is recommended for. Drawing is not to scale. Supply Voltage and Write Protect Voltage. For a list of available options e. Reformatted; Temperature information added to tables Table 2, 3, 4, 5, 7, 8, 9, 10 ; Figure.
Remove references to “clock” in document. Fix error in Ordering Information Table Information furnished is believed to be accurate and reliable.
M48Z02 Datasheet PDF
However, STMicroelectronics assumes no responsibility for the consequences. No license is granted. Specifications mentioned in this publication are subject. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not. All other names are the property of their respective owners.